PS1 Power Replay Datel clone - RE Notes

DISCLAIMER

Any use of this project is under your own responsibility. You will be responsible of checking the correct construction and functionality of your board. By using this project You will agree that I cannot be held responsible if it will destroy any of your devices, damage your computer, burn down your house or whatever.

Introduction

This board is a reconstruction (with a few improvements) of a clone of a Datel cheat cart for PlayStation. This project builds upon the work I uploaded in this repository repository regarding the reverse engineering and mapping of said clone.

This device can be used with the original (provided) EPROM dump, or with unirom.

I replaced the crappy zener-diode power regulation of the original clone with a proper linear regulator, plus the DB25 connector was replaced with an IDC connector.

Support

If you wish to support me in building new hardware and software for old machines, throw a few euros in my direction via Ko-Fi ☕!

Hardware

The board was designed with KiCad EDA.

Bill of Materials

Component	Qty	Type / Value	Notes
U1	1	29F010/29F020/39SF010/39SF020... DIP-32	Either install this or U4
U4	1	29F010/29F020/39SF010/39SF020... PLCC-32	Either install this or U1
U2	1	GAL16V8 (tested 16V8B) DIP-20	Either install this or U7
U7	1	GAL16V8 (tested 16V8B) PLCC-20	Either install this or U2
U3	1	74F245 DIP-20	Either install this or U5
U5	1	74F245 SOP-20	Either install this or U3
J2	1	2x10 2.54mm pinheader
T1	1	78L05 TO-92
SW1	1	SPDT switch	3 pins. The pitch between the pins is roughly 2.8mm, These or these can probably be adapted
R1	1	10K resistor, either THT or SMD (1206)
C1, C2	2	100nF/16V capacitor, either THT or SMD (1206)
C3	1	470nF/16V capacitor, either THT or SMD (1206)
J1	1	68pin PlayStation PIO port connector	Solder this on the opposite side of the board in respect to other components. You can use this ready made connector, or adapt this by dremeling away the extra plastic at the side

Remember to program the GAL with the provided JED file.

Pinout

External I/O
.----.----.----.----.----.----.----.----.----.----.
|  2 |  4 |  6 |  8 | 10 | 12 | 14 | 16 | 18 | 20 |
'----'----'----'----'----'----'----'----'----'----'
|  1 |  3 |  5 |  7 |  9 | 11 | 13 | 15 | 17 | 19 |
'----'----'----'----'----'----'----'----'----'----'

1,3,5,7,9,11,13,15,17,19 - GND
2,4,6,8,10,12,14,16 - D0 through D7
18 - Strobe
20 - ACK

Ordering the boards

You can order the board for this project at PCBWay and support me or download the gerbers and have them printed wherever you like!!!

Notes

The PCB was fully disassembled, scanned, and traced to reconstruct the schematic. It's a simple dual-layer board containing a diode, a PLD, an EEPROM and a transceiver, plus a few passives.

Memory map and protocol

Information on the protocol can be found here, but here is the basic memory map of this device:

  1F000000h-1F01FFFFh R/W Flash (first 128K)
  1F020010h           R   Comms Link STB pin state (bit0)
  1F020018h           R   Switch Setting (bit0: 0=Off, 1=On)
  1F040000h-1F05FFFFh R/W Flash (second 128K)
  1F060000h           R   Comms Link data in (byte)
  1F060008h           W   Comms Link data out (byte, pulses ACK to Comms Link)

EEPROM size

The EEPROM used on this board is a PLCC AM29F010, 128KB. The Board is wired in a way that a 29F020 can be installed and the a second bank of 128KB used.

PLD

A GAL16V8B provides signal decoding to enable the transceiver, EEPROM, read the state of the STROBE signal on the DSUB-25 connector and of the sliding switch.

This IC was protected on my board, so I proceeded with an analysis of the signals and their combinations. The results can be seen in the PLD directory. Interestingly, while connected, the A20 line seems to be ignored in all the calculations performed by this PLD.