Add notes on PLD

This commit is contained in:
hkz 2025-06-03 18:27:21 +02:00
commit d215c4000a
5 changed files with 3385 additions and 1019 deletions

51
PLD/GAL16V8_eprom_01.toml Normal file
View file

@ -0,0 +1,51 @@
# Example of a definition for a GAL16V8 for use in the EPROM_01 pod
name = "GAL16V8"
[pinout]
# Defines both package structure and number of pins for each side. L, R, in order.
pins_per_side = [10, 10]
# List of all the pins of the IC, from 1 onward, as mapped on the ZIF42 socket of the dupico
# note that, in this list, 21 is a placeholder for GND, 42 a placeholder for a power source (which could be 5V or different).
# These are used to properly draw the map on the interface
ZIF_map = [7, 8, 9, 10, 11, 12, 13, 14, 15, 21, 27, 28, 29, 30, 31, 32, 33, 34, 35, 42]
# List of the pins, as numbered on the IC, that can be used as clock inputs
clk_pins = [1]
# List of the pins, as numbered on the IC, that are input only pins
in_pins = [1, 2, 3, 4, 5, 6, 7, 8, 9, 11]
# List of the pins, as numbered on the IC, that are I/O pins (can be configured as inputs or outputs)
io_pins = [12, 13, 14, 15, 16, 17, 18, 19]
# List of the pins, as numbered on the IC, that are output only
o_pins = []
# List of the pins, as numbered on the IC, that are registered outputs
q_pins = [12, 13, 14, 15, 16, 17, 18, 19]
# List of the pins that are active low OE
oe_l_pins = [11]
# List of the pins that are active high OE
oe_h_pins = []
# List of the pins, as numbered on the IC, that can be used as feedback pins
f_pins = [12, 13, 14, 15, 16, 17, 18, 19]
# List of the output pins, as numbered on the IC, capable of going HI-Z
hiz_o_pins = [12, 13, 14, 15, 17, 19]
names_override = ["A2", "A3", "A4", "UNK1", "A18", "A17", "A20", "/CS0", "/SWR0", "GND", "/SRD", "/EEWR", "D0", "/EEOE", "ACK", "SW", "UNK2", "STRB", "/XCVEN", "VCC"]
[adapter]
# pins that need to be forced high to read this in the adapter
hi_pins = [23]
# Notes on the adapter necessary to read this IC
notes = "Insert the EPROM_01 POD in the dupico, topmost position in socket, and insert the GAL in the bottom of the ZIF32 socket."
[requirements]
hardware = 3

20
PLD/notes.txt Normal file
View file

@ -0,0 +1,20 @@
D0, pin 13, an output. Normally in Hi-Z gets enabled when
- Reading the STRB pin (18)
- Reading the SW pin (16)
D0.OE = /CS0 & /SRD & /A18 & A17
Then it can read either the status of the switch at address 1F020018h or the status of the STB pin at 1F020010h
D0 = STRB & /A2 & /A3 & A4 + // Strobe pin
FW & /A2 & A3 & A4 // Switch pin
/XCVR_EN, pin 19, enables or disables the 74F245 transceiver
/XCVR_EN = /CS0 & /SWR0 & /A2 & A3 & /A4 & A17 & A18 + // Write to commlink, 1F060008h
/CS0 & /SRD & /A2 & /A4 & A17 & A18 // Read from commlink, 1F060000h
ACK, pin 15, is acting both as a way to notify someone on the DSUB-25 that we are writing, and as a way to switch the 74F245 bus direction
ACK = /CS0 & /SWR0 & /A2 & A3 & /A4 & A17 & A18
/EEOE, pin 14, is connected to the /OE pin of the EEPROM, 1F000000h-1F01FFFFh / 1F040000h-1F05FFFFh
/EEOE = /CS0 & /SRD & /A17
/EEWR, pin 12, is connected to the /WR pin of the EEPROM, 1F000000h-1F01FFFFh / 1F040000h-1F05FFFFh
/EEWR = /CS0 & /SWR0 & /A17

File diff suppressed because it is too large Load diff

View file

@ -51,7 +51,13 @@
"min_clearance": 0.5
}
},
"diff_pair_dimensions": [],
"diff_pair_dimensions": [
{
"gap": 0.0,
"via_gap": 0.0,
"width": 0.0
}
],
"drc_exclusions": [],
"meta": {
"version": 2
@ -180,7 +186,11 @@
"td_width_to_size_filter_ratio": 0.9
}
],
"track_widths": [],
"track_widths": [
0.0,
0.4,
0.8
],
"tuning_pattern_settings": {
"diff_pair_defaults": {
"corner_radius_percentage": 80,
@ -207,7 +217,12 @@
"spacing": 0.6
}
},
"via_dimensions": [],
"via_dimensions": [
{
"diameter": 0.0,
"drill": 0.0
}
],
"zones_allow_external_fillets": false
},
"ipc2581": {

File diff suppressed because it is too large Load diff