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Add notes on PLD
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5 changed files with 3385 additions and 1019 deletions
51
PLD/GAL16V8_eprom_01.toml
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51
PLD/GAL16V8_eprom_01.toml
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# Example of a definition for a GAL16V8 for use in the EPROM_01 pod
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name = "GAL16V8"
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[pinout]
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# Defines both package structure and number of pins for each side. L, R, in order.
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pins_per_side = [10, 10]
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# List of all the pins of the IC, from 1 onward, as mapped on the ZIF42 socket of the dupico
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# note that, in this list, 21 is a placeholder for GND, 42 a placeholder for a power source (which could be 5V or different).
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# These are used to properly draw the map on the interface
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ZIF_map = [7, 8, 9, 10, 11, 12, 13, 14, 15, 21, 27, 28, 29, 30, 31, 32, 33, 34, 35, 42]
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# List of the pins, as numbered on the IC, that can be used as clock inputs
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clk_pins = [1]
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# List of the pins, as numbered on the IC, that are input only pins
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in_pins = [1, 2, 3, 4, 5, 6, 7, 8, 9, 11]
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# List of the pins, as numbered on the IC, that are I/O pins (can be configured as inputs or outputs)
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io_pins = [12, 13, 14, 15, 16, 17, 18, 19]
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# List of the pins, as numbered on the IC, that are output only
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o_pins = []
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# List of the pins, as numbered on the IC, that are registered outputs
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q_pins = [12, 13, 14, 15, 16, 17, 18, 19]
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# List of the pins that are active low OE
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oe_l_pins = [11]
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# List of the pins that are active high OE
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oe_h_pins = []
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# List of the pins, as numbered on the IC, that can be used as feedback pins
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f_pins = [12, 13, 14, 15, 16, 17, 18, 19]
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# List of the output pins, as numbered on the IC, capable of going HI-Z
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hiz_o_pins = [12, 13, 14, 15, 17, 19]
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names_override = ["A2", "A3", "A4", "UNK1", "A18", "A17", "A20", "/CS0", "/SWR0", "GND", "/SRD", "/EEWR", "D0", "/EEOE", "ACK", "SW", "UNK2", "STRB", "/XCVEN", "VCC"]
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[adapter]
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# pins that need to be forced high to read this in the adapter
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hi_pins = [23]
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# Notes on the adapter necessary to read this IC
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notes = "Insert the EPROM_01 POD in the dupico, topmost position in socket, and insert the GAL in the bottom of the ZIF32 socket."
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[requirements]
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hardware = 3
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20
PLD/notes.txt
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20
PLD/notes.txt
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D0, pin 13, an output. Normally in Hi-Z gets enabled when
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- Reading the STRB pin (18)
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- Reading the SW pin (16)
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D0.OE = /CS0 & /SRD & /A18 & A17
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Then it can read either the status of the switch at address 1F020018h or the status of the STB pin at 1F020010h
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D0 = STRB & /A2 & /A3 & A4 + // Strobe pin
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FW & /A2 & A3 & A4 // Switch pin
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/XCVR_EN, pin 19, enables or disables the 74F245 transceiver
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/XCVR_EN = /CS0 & /SWR0 & /A2 & A3 & /A4 & A17 & A18 + // Write to commlink, 1F060008h
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/CS0 & /SRD & /A2 & /A4 & A17 & A18 // Read from commlink, 1F060000h
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ACK, pin 15, is acting both as a way to notify someone on the DSUB-25 that we are writing, and as a way to switch the 74F245 bus direction
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ACK = /CS0 & /SWR0 & /A2 & A3 & /A4 & A17 & A18
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/EEOE, pin 14, is connected to the /OE pin of the EEPROM, 1F000000h-1F01FFFFh / 1F040000h-1F05FFFFh
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/EEOE = /CS0 & /SRD & /A17
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/EEWR, pin 12, is connected to the /WR pin of the EEPROM, 1F000000h-1F01FFFFh / 1F040000h-1F05FFFFh
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/EEWR = /CS0 & /SWR0 & /A17
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@ -51,7 +51,13 @@
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"min_clearance": 0.5
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}
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},
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"diff_pair_dimensions": [],
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"diff_pair_dimensions": [
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{
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"gap": 0.0,
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"via_gap": 0.0,
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"width": 0.0
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}
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],
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"drc_exclusions": [],
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"meta": {
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"version": 2
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@ -180,7 +186,11 @@
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"td_width_to_size_filter_ratio": 0.9
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}
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],
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"track_widths": [],
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"track_widths": [
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0.0,
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0.4,
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0.8
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],
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"tuning_pattern_settings": {
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"diff_pair_defaults": {
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"corner_radius_percentage": 80,
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@ -207,7 +217,12 @@
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"spacing": 0.6
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}
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},
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"via_dimensions": [],
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"via_dimensions": [
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{
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"diameter": 0.0,
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"drill": 0.0
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}
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],
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"zones_allow_external_fillets": false
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},
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"ipc2581": {
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