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a157bf4e1c
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Replace footprints for res/caps with mixed SMD/THT
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2025-06-12 22:51:46 +02:00 |
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722f08a5bb
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Changes to the power traces
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2025-06-12 21:42:56 +02:00 |
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65e46e83e8
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Add zones in datclone
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2025-06-12 20:30:14 +02:00 |
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f11e4d3555
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Removed assembled PCB from README
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2025-06-06 13:44:41 +02:00 |
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fb2bcc7744
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Add EEPROM dump and readme
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2025-06-06 13:43:32 +02:00 |
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acfc79f7d7
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Add edge cuts
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2025-06-05 22:33:29 +02:00 |
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e9b7de73af
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Mark unused connections as NC
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2025-06-05 22:16:52 +02:00 |
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82088f871a
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Map all traces
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2025-06-05 22:16:00 +02:00 |
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d52995d766
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Update trace mapping
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2025-06-05 20:18:43 +02:00 |
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b4e377a7df
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Some more traces
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2025-06-04 18:12:43 +02:00 |
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97a67e6a45
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map other traces
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2025-06-04 15:41:37 +02:00 |
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24576e65f9
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Update traces
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2025-06-04 15:21:21 +02:00 |
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cb5be768c9
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Add reversed PLD files
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2025-06-04 13:55:02 +02:00 |
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b087f4ab26
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Further mapping
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2025-06-03 20:08:06 +02:00 |
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4eaf0733e7
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Map more traces
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2025-06-03 18:43:10 +02:00 |
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d215c4000a
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Add notes on PLD
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2025-06-03 18:27:21 +02:00 |
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005ad91d2d
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More traces
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2025-06-03 14:40:13 +02:00 |
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d88b341b49
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Another trace
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2025-06-03 13:47:07 +02:00 |
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ead1c21ed5
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Add additional traces
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2025-06-03 12:48:04 +02:00 |
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62e0c6df5b
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Another trace connected
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2025-06-03 12:23:18 +02:00 |
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6e12543390
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Some more traces
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2025-06-03 08:20:11 +02:00 |
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4a9d272a9e
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Update schematic
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2025-06-02 22:30:43 +02:00 |
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7ef2672925
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Begin mapping some traces
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2025-06-02 22:08:18 +02:00 |
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422be17b65
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Add schematics
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2025-06-02 21:41:24 +02:00 |
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3bbd794edb
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Update PCB and footprints
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2025-06-02 15:42:40 +02:00 |
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9fdb4d986c
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Begin implementing symbols
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2025-06-02 15:03:57 +02:00 |
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48ef89dd30
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Add double layer
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2025-06-02 09:28:15 +02:00 |
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6cf58bbdf4
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Import pics for the board
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2025-06-02 09:25:31 +02:00 |
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Fabio Battaglia
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1cbc377c02
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Initial commit
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2025-06-02 06:54:38 +00:00 |
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